“Low Power Design: A Multimedia IP Perspective”
DR. Ihab Amer
9 Dec. 2015
Abstract— In an era where battery-driven thin devices integrate a wide collection of sophisticated multimedia functionalities, low power multimedia is not optional anymore. Hi-tech vendors need to continuously seek ways to cut their chips’ power bills. This is not fully achievable by only migrating to lower leakage technologies. The R&D community is betting on the huge amount of talent it has, where contributors all over the globe will take part by coming up with innovative ideas to collectively lead to the desired power savings. It is known that the first step to solve a problem is to understand it and learn how others are dealing with it. Hence, this talk comes to introduce the basic concepts of low power design, and to highlight some of the efforts that take place in the R&D community to reduce power consumption at different phases of design and levels of abstraction. Though many of the given examples will be based on Multimedia/Video IPs, most of the ideas can be leveraged within other contexts. The talk will also pinpoint some trends that show high potential to reduce power consumption of future multimedia IPs. The plan is to deliver the intended material in a 90 minutes presentation (including Q&A). The material is designed to increase interactivity with the audience, providing them with the opportunity to express their thoughts, and to interrupt and ask questions.
Biography of Speaker— Ihab Amer (Ph.D. 07, M.Sc. 03, and B.Sc. 00) received his Ph.D. degree in Electrical and Computer Engineering from the University of Calgary (U of C, Calgary, AB, Canada), his M.Sc. degree in Computer Science from the American University in Cairo (AUC, Cairo, Egypt), and his B.Sc. degree in Computers and Systems Engineering from Ain Shams University (Cairo, Egypt). In January 2012, Dr. Amer joined Advanced Micro Devices (AMD, Markham, Canada) as a Principal Member of Technical Staff (PMTS), Software Multimedia Drivers. He works on designing and defining strategies of AMD Video CODEC solutions, targeting both APU and Discrete GPU platforms. Before that, he worked as an Assistant Professor at the Department of Digital Media Engineering and Technology (DMET) of the German University in Cairo (GUC, Cairo, Egypt) for 5 years. He also worked as an overseas research consultant for 4 years with the Advanced Technology Information Processing Systems (ATIPS) Labs at the U of C. Dr. Amer spent a 2-year research visit at the Multimedia Architectures Research Group of Ecole Polytechnique Fédérale de Lausanne (EPFL, Lausanne, VD, Switzerland), and he spent a 6-month visiting period at the DSP division of Xilinx Inc. (Austin, TX, USA). He has been a member of the ISO/IEC Moving Picture Experts Group (MPEG) Standard Committee and the CAC for the SCC (Subcommittees 6 and 29). Dr. Amer has participated in the organization of several academic and professional events such as the 20th meeting of ISO/IEC JTC 1, IWSOC, and ICMENS. He served as the local co-chair of IWSOC’06 and ICMENS’06 (Cairo, Egypt). He organized/chaired the ICIP’09 Special Session on Reconfigurable Video Coding (RVC) (Cairo, Egypt) as well as the RVC Special Session at the ECSI Conference on Design and Architectures for Signal and Image Processing (Edinburgh, UK). Dr. Amer is a holder of several prestigious awards and highly competitive scholarships. This includes the 2015 AMD Innovation Award, the Alberta Ingenuity Fund (AIF), the Informatics Circle of Research Excellence (iCORE), and the prestigious ISO/IEC award for the “special contribution” as a project editor in the international MPEG standard (MPEG-4 Part 9). He has over 40 contributions to MPEG standards, and he has authored/coauthored over 30 peer-reviewed conference and journal papers, out of which four of them received (or were nominated to) the best paper/poster award. Dr. Amer is a Senior Member of IEEE. He is also licensed as a Professional Engineer in Ontario. Dr. Amer has two issued patents and numerous pending ones. His core research interests include (but are not limited to) digital video coding/analysis, low-power multimedia architectures, and signal processing on parallel architectures.