The NISC team wins the best paper on the International Conference on Modern Circuits and Systems Technologies (MOCAST) in 2017.
This paper proposes a hardware platform implementation on FPGA for modelling two fractional-order derivative operators. The Grünwald-Letnikov and Caputo definitions are realized for different fractional orders. The realization is based on non-uniform segmentation algorithm with a variable lookup table. A generic implementation for Grünwald-Letnikov is proposed and a Fixed Point Booth multiplier radix-4 is used for Caputo implementation. Carry look-ahead adder, multi-operand adder and booth multiplier are used to improve the performance and other techniques for area and delay minimization have been employed. A comparison between the two presented architectures is introduced. The proposed designs have been simulated using Xilinx ISE and realized on FPGA Xilinx virtex-5 XC5VLX50T.
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